Publications

Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks

Published in EAI Transactions on Industrial Networks and Intelligent Systems, 2020

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Recommended citation: Xuan Tran, Ngoc Nguyen, Duy Bui, Kiem Nguyen, Minh Pham, Cong Pham, "Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks." EAI Transactions on Industrial Networks and Intelligent Systems, 2020. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3113/

An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks

Published in In the proceedings of 2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019

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Recommended citation: Duy-Anh Nguyen, Duy-Hieu Bui, Francesca Iacopi, Xuan-Tu Tran, "An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks." In the proceedings of 2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3725/

An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing

Published in In the proceedings of 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 2018

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Recommended citation: Duy-Anh Nguyen, Huy-Hung Ho, Duy-Hieu Bui, Xuan-Tu Tran, "An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing." In the proceedings of 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 2018. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3114/

Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation

Published in In the proceedings of The 4th NAFOSTED Conference on Information and Computer Science (NICS), 2017

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Recommended citation: Huy-Hung Ho, Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation." In the proceedings of The 4th NAFOSTED Conference on Information and Computer Science (NICS), 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2746/

Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing

Published in In the proceedings of The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 2017

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Recommended citation: Quang-Linh Nguyen, Dinh-Lam Tran, Duy-Hieu Bui, Duc-Tho Mai, Xuan-Tu Tran, "Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing." In the proceedings of The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2745/

?AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures

Published in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2017

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Recommended citation: Xuan Tran, Tung Nguyen, Hai Phan, Duy Bui, "?AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2468/

AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications

Published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017

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Recommended citation: Duy Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan Tran, "AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2490/

Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications

Published in In the proceedings of The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 2016

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Recommended citation: Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan-Tu Tran, "Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications." In the proceedings of The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 2016. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/1511/

Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques

Published in In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014

Outstanding Student Paper Award \& Travel Support Grant Award

Recommended citation: Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques." In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/426/

H.264/AVC Hardware Encoders and Low-Power Features

Published in In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014

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Recommended citation: Ngoc-Mai Nguyen, Edith Beigne, Suzanne Lesecq, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran, "H.264/AVC Hardware Encoders and Low-Power Features." In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/430/

A Low-Cost Implementation of Advance Encryption Standard

Published in In the proceedings of The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 2014

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Recommended citation: Tien-Luan Vu, Van-Quy Quach, Duy-Hieu Bui, Xuan-Tu Tran, "A Low-Cost Implementation of Advance Encryption Standard." In the proceedings of The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/431/

Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video video H.264/AVC

Published in In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014

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Recommended citation: Duy-Hieu Bui, Nam-Khanh Dang, Ngoc-Mai Nguyen, Kiem-Hung Nguyen, Xuan-Tu Tran, "Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video video H.264/AVC." In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/436/

X^ay d?ng h? th?ng m^o phh ong v`a ki?m ch?ng cho b? m~a ho'a t'in hi?u video H.264/AVC

Published in In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014

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Recommended citation: Duy Bui, Nam Dang, Ngoc Nguyen, Kiem Nguyen, Xuan Tran, "X^ay d?ng h? th?ng m^o phh ong v`a ki?m ch?ng cho b? m~a ho'a t'in hi?u video H.264/AVC." In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/436/

System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder

Published in In the proceedings of REV: the 2013 National Conference on Electronics and Communications, 2013

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Recommended citation: Hai-Phong Phan, Kiem-Hung Nguyen, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran, "System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder." In the proceedings of REV: the 2013 National Conference on Electronics and Communications, 2013. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/417/

High-Performance Adaption of ARM Processor into Network-on-Chip Architectures

Published in In the proceedings of The 26th IEEE International System-on-Chip Conference (SOCC), 2013

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Recommended citation: Tung Nguyen, Duy-Hieu Bui, Hai-Phong Phan, Trong-Trinh Dang, Xuan-Tu Tran, "High-Performance Adaption of ARM Processor into Network-on-Chip Architectures." In the proceedings of The 26th IEEE International System-on-Chip Conference (SOCC), 2013. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/169/

A Hardware Architecture for Intra Prediction in H.264/AVC Encoder

Published in In the proceedings of 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 2012

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Recommended citation: Duy-Hieu Bui, Van Tran, Van Nguyen, Duc Ngo, Xuan-Tu Tran, "A Hardware Architecture for Intra Prediction in H.264/AVC Encoder." In the proceedings of 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 2012. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/41/

Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder

Published in In the proceedings of The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 2011

ISBN: 978-4-88552-258-1

Recommended citation: Duy-Hieu Bui, Xuan-Tu Tran, "Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder." In the proceedings of The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 2011. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/47/